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Simon Heinzle, Gaël Guennebaud, Mario Botsch, Markus Gross
In recent years, point primitives have received a growing attention
in graphics. On one hand, the dramatic increase of polygonal complexity
has led to an overhead in processing huge meshes. On the other hand,
modern 3D digital photography and scanning systems generate huge volumes
of point samples and create the need for advanced digital processing of
points. As a sample of geometry and appearance, points do not store any
connectivity. However, current graphic cards do not yet support the
high-quality rendering of point primitives efficiently. Furthermore,
finding neighboring points is a fundamental operation in point-based
geometry processing, and is usually performed using spatial data structures,
an operation which is still slow on CPU and GPU architectures.
We developed a novel architecture for hardware-accelerated rendering of
point primitives. Our pipeline implements a refined version of EWA
splatting, a high quality method for antialiased rendering of point
sampled representations. A central feature of our design was the seamless
integration of the architecture into conventional, OpenGL-like graphics
pipelines so as to complement triangle based rendering. The specific
properties of the EWA algorithm required a variety of novel design
concepts including a ternary depth test and using an on-chip pipelined
heap data structure for making the memory accesses of splat primitives
more coherent. In addition, we developed a computationally stable evaluation
scheme for perspectively corrected splats. We implemented our architecture
on two prototypes, one using a system of digital signal processors and
a rasterizer ASIC, the other one implementing a more advanced pipeline
using two FPGA boards, and we integrated it into an OpenGL-like
software implementation. Our evaluation comprises a detailed
performance analysis using scenes of varying complexity.
While high-performance software implementations for finding neighboring points
exist, multi-core CPU systems do not scale very well because of their inflexible
and general caching scheme. In comparison, GPGPU implementations are inefficient
considering the size of graphic chips, mainly due to incompatibilities between
the execution patterns and the massively-multithreaded SIMD model. We therefore
investigated a hardware architecture dedicated to the efficient processing of
unstructured point sets. Its core features a configurable neighbor search module
as well as a programmable processing module. Our spatial search module features
a novel advanced caching mechanism that specifically exploits the spatial
coherence inherent in our queries. Our lean, lightweight design could be
seamlessly integrated int existing massively multi-core architectures such as
GPUs. Such an integration could be done in a similar manner as the dedicated
texturing units, where neighborhood queries would be directly issued from running
kernels. We implemented a prototype of the architecture on FPGAs operating at
a rather low frequency of 75 MHz, and its performance already competes with
CPU reference implementations. The architecture is geared towards efficient
generic point processiong by supporting the two fundamental operators cached
neighborhood queries and generic meshless operators. These concepts are widely
used in computer graphics, making our architecture applicable to as diverse
research fields such as point-based graphics, computational geometry, global
illumination and meshless simulations.
- S. Heinzle, G. Guennebaud, M. Botsch, M. Gross, A Hardware Processing Unit for Point Sets, Proceedings of the 23rd SIGGRAPH/Eurographics Conference on Graphics Hardware (Sarajevo, Bosnia and Herzegovina, June 20-21, 2008), pp. 21-31
[Abstract]
[PDF]
- S. Heinzle, O. Saurer, S. Axmann, D. Browarnik, A. Schmidt, F. Carbognani, P. Luethi, N. Felber, M. Gross, A Transform, Lighting and Setup ASIC for Surface Splatting, Proceedings of International Symposium on Circuits and Systems (ISCAS) (Seattle, USA, May 18-21, 2008), pp. 2813-2816
[Abstract]
[PDF]
- T. Weyrich, S. Heinzle, T. Aila, D. B. Fasnacht, S. Oetiker, M. Botsch, C. Flaig, S. Mall, K. Rohre, N. Felber, H. Kaeslin, M. Gross, A Hardware Architecture for Surface Splatting, Proceedings of ACM SIGGRAPH (San Diego, USA, August 5-9, 2007), ACM Transactions on Graphics, vol. 26, no. 3, pp. 90.1-90.11
[Abstract]
[PDF] [Video]
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